1. Field of the Invention
This invention relates to bubble (magnetic domain) memories and more particularly to a storage loop bubble memory organization with means for buffering addressed data from both read and write requests and for storing data prior to transfer into the main memory storage loops or prior to transfer out of the main memory storage loops.
2. Prior Art
Bubble memories on which conditions exist for establishing single wall domains on a suitable magnetic material such as an epitaxial magnetic garnet film on a nonmagnetic substrate are well known. Magnetically soft overlay material in the form of propagate elements are typically arranged in a series of identical storage loops forming a memory organization in which bubbles propagate from one propagate element to another around these loops by the action of an in-plane rotating magnetic field. And in this arrangement, transfer gates forming part of a write-in means and a read-out means transfer bubbles to and from these loops. Typically, on command, bubbles will be transferred in parallel into the storage loops from an input track and also on command bubbles will be transferred from the storage loops to an output track where they are then serially detected as they are propagated through a sensor which detects the presence or absence of a bubble and generates a signal as a binary "1" or a binary "0" data bit.
Although the bubble memory systems employing the storage loops of the type described have numerous economic and operational advantages, there are major shortcomings in the systems. This was pointed out in the co-pending application by the same inventor, supra, where it was shown that the write-in means and the read-out means could be decoupled from the cyclic propagation cycles of the storage loops in order to improve the steady state random access performance of the bubble memory. This was accomplished by providing idlers between the input track and the transfer-in gates in the write-in section of the memory and between the annihilator and the output track in the read-out section. Thus, blocks of data bits awaiting transfer into the storage loops or onto the output track could be held until the appropriate time for transfer leaving the input track and the output track free to transfer a block of data bits independently of each other and of the position of the blocks of bits in the storage loops.
In the present invention, in addition to the aforesaid idlers, the memory system is further improved by providing additional short or buffer storage loops between the input track and the idler in the write-in section and in the read-out section between the idler and the output track; one short or buffer storage loop for each large or main memory storage loop. Thus, these buffer loops are virtually asynchronous in operation with respect to each other and to the main memory storage loops and data can thus be temporarily stored in the buffer loops prior to transfer into the main storage loops and prior to transfer into the output track.
The buffer loops make it possible to store a number of data blocks, typically five to eight, and transfer them to or from the long storage loops as their respective positions come to the transfer gates. Write and read operations can occur simultaneously. The propagation cycles required to serially transfer in or out also causes data to propagate in both the long storage loops and the short or buffer loops. Thus, during high steady state random access periods, the latency time required to position blocks in the long storage loops is completely masked by the serial propagation of data on the input and output tracks.
Accordingly, it is an object of this invention to optimize performance of a bubble memory storage loop organization by providing on chip buffering of data.